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october 2008 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 sg6846b ? highly integrated green-mode pwm controller sg6846b highly integrated green-mode pwm controller features ? low startup current: 8a ? low operating current: 3.7ma ? peak-current mode operation with cycle-by-cycle current limiting ? pwm frequency continuously decreasing with burst mode at light loads ? v dd over voltage protection (ovp) ? ac input brownout protection with hysteresis ? constant output power limit (full ac input range) ? internal latch circuit for ovp, otp, and ocp (blsy, blsz) ? two-level ocp delay with 200ms ? programmable pwm frequency with frequency hopping ? ocp threshold is 2/3 peak current limit ? soft startup time: 5ms applications general-purpose switch-mode power supplies and flyback power converters, including: ? power adapters ? open-frame smps ? smps with surge-current output, such as for printers, scanners, motor drivers description the highly integrated pwm controller, sg6846b, provides several features to enhance the performance of fly-back converters. to minimize standby power consumption, a proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency under light-load conditions. under zero-load conditions, the power supply enters burst-mode. this completely shuts off pwm output. if v fb is larger than around 1.6v, pwm pulses out. this green-mode function enables power supplies to meet international power conservation requirements. the sg6846b is designed for smps with surge-current output. it is incorporated with a two-level ocp function. besides, the cycle-by-cycle current limiting, if the switching current is higher than ocp threshold and lasts for 200ms, sg6846b stops gate immediately and latches itself (blsy version) or restarts after v dd charges up to 16.5v (bcsy version). sg6846b also integrates frequency-hopping function internally. the frequency hopping function helps reduce emi emission of a power supply with minimum line filters. it has built- in synchronized slope compensation, proprietary internal compensation for constant output power limit over universal ac input range. the gate output is clamped at 18v to protect the external mosfet from over-voltage damage. protection include: ac input brownout protection with hysteresis and v dd over-voltage protection. for over- temperature protection, an ex ternal ntc thermistor can be applied to sense the ambient temperature. when ocp, v dd ovp, or otp are activated, an internal latch circuit is used to latch-off t he controller. the latch resets when v dd supply is removed. sg6846b is available in 8-pin sop package. ordering information part number operating temperature range ocp latch eco status package packing method SG6846BLSY -40 to +105c yes green 8-pin sm all outline package (sop) tape & reel sg6846blsz -40 to +105c yes rohs 8-pin small outline package (sop) tape & reel sg6846bcsy -40 to +105c no green 8-pin small outline package (sop) tape & reel sg6846bcsz -40 to +105c no rohs 8-pin small outline package (sop) tape & reel for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 2 sg6846b ? highly integrated green-mode pwm controller typical application l n emi filter + + + vo+ vo- ac input vin ri vdd gate sense gnd sg6846b fb rt 8 7 5 6 3 2 4 1 + figure 1. typical application block diagram gate fb sense 1 gnd slope compensation vdd 7 5 rt vin 3 2 6 internal bias 8 4 6.2v + soft driver vdd 3r 2r 1r s q r 1.05v i rt 16.5v/10.5v uvlo green mode osc 1r blanking circuit ocp delay otp delay scp delay debounce v dd -th-g latch 23.6v over power compersation 0.895-0.065 x v in 0.9v/0.7v 1.15v figure 2. block diagram
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 3 sg6846b ? highly integrated green-mode pwm controller marking information sg6846bftp xxxxxxxxywwv marking for sg6846blsz (pb-free) sg6846bcsz (pb-free) figure 3. top mark 1 marking for SG6846BLSY (green-compound) sg6846bcsy (green-compound) figure 4. top mark 2 f: l = ocp latch, c = ocp auto-recovery t : s = sop p: z = lead free + rohs compatible null = regular package xxxxxxxx : wafer lot y : year; ww : week v : assembly location : fairchild logo z: plant code x: year code y: week code tt: die run code f: l = ocp latch, c = ocp auto-recovery t : package type, s = sop p: y = green package m: manufacturing flow code
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 4 sg6846b ? highly integrated green-mode pwm controller pin configuration figure 5. pin configuration pin definitions pin # name function description 1 gnd ground ground. 2 fb feedback the signal from the external compensation circuit is fed into this pin. the pwm duty cycle is determined in response to the signal from this pin and the current- sense signal from pin 6. 3 vin line-voltage detection line-voltage detection is used for brownout protection with hysteresis. constant output power limit over universal ac input range is achieved using this pin. add a low-pass filter to filter out line ripple on the bulk capacitor. 4 ri reference setting a resistor from the ri pin to ground gener ates a reference current source that determines the switching frequency. incr easing the resistance reduces the switching frequency. a 26k ? resistor results in a 65khz switching frequency. 5 rt temperature detection for over-temperature protection, an exter nal ntc thermistor is connected from this pin to the gnd pin. the im pedance of the ntc decreases at high temperatures. once the voltage of the rt pin drops below a threshold, pwm output is disabled. 6 sense current sense the sensed voltage is used for peak-cu rrent-mode control and cycle-by-cycle current limiting. if the switching current is higher than ocp threshold and lasts for 200ms, sg6846b turns off immediatel y. this two-level ocp feature is especially suitable for smps with surge current output. 7 vdd power supply if an open-circuit failure occurs in the feedback loop, the internal protection circuit disables pwm output as long as v dd exceeds a threshold. 8 gate driver output the totem-pole output driver for the power mosfet; internally clamped below 18v.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 5 sg6846b ? highly integrated green-mode pwm controller absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. all voltage values, except differential voltages, are given with respect to gnd pin. symbol parameter min. max. unit v dd supply voltage 30 v v l input voltage to fb, sense, vin, rt, ri pins -0.3 7.0 v p d power dissipation at t a <50c sop 400 mw jc thermal resistance (junction-to-case) sop 54.4 c/w t j operating junction temperature -40 +150 c t stg storage temperature range -65 +150 c t l lead temperature, wave soldering, 10 seconds +260 c human body model, jesd22-a114 5.0 esd charge device model, jesd22-c101 1.5 kv recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a operating ambient temperature -40 +105 c
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 6 sg6846b ? highly integrated green-mode pwm controller electrical characteristics v dd = 15v and t a = 25c unless otherwise noted. symbol parameter test condition min. typ. max. unit v dd section v dd-op continuously operating voltage 20 v v dd-on turn-on threshold voltage 15.5 16.5 17.5 v v dd-off turn-off voltage 9.5 10.5 11.5 v v dd-scp threshold voltage on v dd for short-circuit protection v dd-off +0.5v v dd-off +1.0v v dd-off +1.5v v v dd-lh threshold voltage for latch-off release 3 4 5 v i dd-st startup current v dd-on ? 0.16v 8 30 a i dd-op operating supply current gate open 3.7 5.0 ma v dd-ovp v dd over-voltage protection (latch off) 23 24 25 v t d-vddovp v dd ovp debounce time r i = 26k ? 150 s i dd-ovp v dd ovp latch-off holding current v dd = 5v 30 50 70 a v in section v in-off pwm turn-off threshold voltage 0.65 0.70 0.75 v v in-on pwm turn-on threshold voltage v in-off +0.18 v in-off +0.20 v in-off +0.22 v feedback input section a v input-voltage to current-sense a ttenuation 1/3.5 1/4.0 1/4.5 v/v z fb input impedance 4.0 5.5 7.0 k ? v fbo fb pin open voltage 5.2 6.2 6.6 v current sense section z sense input impedance 12 k ? t pd delay to output 100 250 ns t leb leading-edge blanking time 270 360 ns v slope slope compensation duty = dcy max 0.30 0.33 0.36 v v sth1v threshold voltage for current limit v in = 1v 0.80 0.83 0.86 v v sth3v threshold voltage for current limit v in = 3v 0.67 0.70 0.73 v v sth1v-2/3 ocp threshold voltage for current limit v in = 1v 0.58 0.61 0.64 v v sth3v-2/3 ocp threshold voltage for current limit v in = 3v 0.48 0.51 0.54 v t d-ocp delay time for over-current protection r i = 26k ? 175 200 225 ms t d-short output short circuit protection delay time v cs > v sth , r i = 26k ? , v dd < v dd-scp 6 7 8 ms t ss-65khz r i = 26k ? 4.5 5.0 5.5 ms t ss-130khz period during soft start time r i = 13k ? 2.25 2.50 2.75 ms continued on following page?
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 7 sg6846b ? highly integrated green-mode pwm controller figure 6. sg6846b ocp/scp logic flow diagram electrical characteristics (continued) v dd = 15v and t a = 25c unless otherwise noted. symbol parameter test condition min. typ. max. unit oscillator section center frequency 62 65 68 f osc normal pwm frequency jitter range r i = 26k ? , v fb >v n 3.7 4.2 4.7 khz center frequency 124 130 136 f osc,max maximum pwm frequency jitter range r i = 13k ? , v fb >v n 7.4 8.4 9.4 khz center frequency 44.8 47.0 49.2 f osc,min minimum pwm frequency jitter range r i = 36k ? , v fb >v n 2.54 2.90 3.26 khz t hop-1 jitter period r i = 26k ? , v fb v n 3.9 4.4 4.9 ms f osc-g green-mode minimum frequency r i = 26k ? 18.0 22.5 25.0 khz s g slope for green-mode modulation r i = 26k ? 85 hz/mv pin, fb voltage 1.9 2.1 2.3 v v fb-n fb pin frequency reduction threshold jitter range r i = 26k ? , v fb = v n 3.7 4.2 4.7 khz v fb-g fb voltage at f osc-g pin, fb voltage r i = 26k ? , v fb = v g 1.4 1.6 1.8 v f dv frequency variation vs. v dd deviation v dd = 11.5v to 20v 5 % f dt frequency variation vs. temperature deviation t a = -30 to 85c 1.5 5.0 % continued on following page? ( 1 ) no rm a l ope r a t i on ( 2 ) i p > 2 / 3 i pk ? ( 3 ) t i m i ng = 8 m s ( 4 ) v dd < 12 v ? ( 5 ) t i m i ng = 200 ms ( 6 ) v dd < = 12 v ? ( 7 ) gate-off n o no ye s ye s no o cp s cp s cp
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 8 sg6846b ? highly integrated green-mode pwm controller electrical characteristics (continued) v dd = 15v and t a = 25c unless otherwise noted. symbol parameter test condition min. typ. max. unit pwm output section dcy max maximum duty cycle 80 85 90 % v ol output voltage low v dd = 15v, i o = 50ma 1.5 v v oh output voltage high v dd = 12v, i o = 50ma 8 v t r rising time gate = 1nf 350 ns t f falling time gate = 1nf 50 ns v clamp gate output clamping voltage v dd = 20v 18 v over-temperature protection (otp) section (1) i rt output current of rt pin r i = 26k ? 64 70 76 a v rtth threshold voltage for otp 1.00 1.05 1.10 v SG6846BLSY or sg6846bcsy, r i = 26k ? , v fb >v n 100 ms t dotp-latch over-temperature latch-off debounce sg6846blsz or sg6846bcsz, r i = 26k ? , v fb >v n 100 s r rt-off equivalent impedance of rt for otp (1) r i = 26k ? 14 15 16 k ? r i section ri nor r i operating range 13 36 k ? ri max maximum r i value for protection 10 m ? ri min minimum r i value for protection 6 k ? note: 1. the relationship between r rt-off and r i is: )) (k r / 26 a (70 / v i / v r i rt rt off - latch - otp off - rt = = (1)
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 9 sg6846b ? highly integrated green-mode pwm controller typical performance characteristics turn-on threshold voltage (v dd-on ) vs temperature 16.0 16.2 16.4 16.6 16.8 17.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v dd-on (v) turn-off voltage (v dd-off ) vs temperature 9.0 9.5 10.0 10.5 11.0 11.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v dd-off (v) figure 7. turn-on threshold voltage (v dd-on ) vs. temperature figure 8. turn-off threshold voltage (v dd-off ) vs. temperature startup current (i dd -st ) vs temper ature 6.0 10.0 14.0 18.0 22.0 26.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) i dd -st (a) operating supply current (idd-op) vs temperature 4.0 4.5 5.0 5.5 6.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) idd-op (ma) figure 9. startup current (i dd-st ) vs. temperature figure 10. operating supply current (i dd-op ) vs. temperature ocp thres hold voltage for current lim it (v sth1v-2/3 )vs temperature 0. 56 0. 58 0. 60 0. 62 0. 64 0. 66 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v sth1v-2/3 (v) ocp threshold voltage for current limit (v sth3v-2/3 )vs temper ature 0.50 0.52 0.54 0.56 0.58 0.60 -40 -25 -10 5 20 35 50 65 80 95 110 125 temper ature ( ) v sth3v-2/3 (v) figure 11. ocp threshold voltage for current limit (v sth1v-2/3 ) vs. temperature figure 12. ocp threshold voltage for current limit (v sth3v-2/3 ) vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 10 sg6846b ? highly integrated green-mode pwm controller typical performance characteristics (continued) normal pwm frequency (f osc )vs temperature 62.0 62.5 63.0 63.5 64.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) f osc (khz) maximum duty cycle (dcymax) vs temperature 86.2 86.4 86.6 86.8 87.0 87.2 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) dcymax (%) figure 13. normal pwm frequency (f osc ) vs. temperature figure 14. maximum duty cycle (d cymax ) vs. temperature output current of rt pin (i rt )vs temperature 69.8 70.0 70.2 70.4 70.6 70.8 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) i rt (a) trigger voltage of otp (v rtth )vs temperature 1.00 1.02 1.04 1.06 1.08 1.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v rtth (v) figure 15. output current of rt pin (i rt ) vs. temperature figure 16. trigger voltage of otp(v rtth ) vs. temperature pw m turn-on threshold voltage (v in-on ) vs temperature 0.905 0.910 0.915 0.920 0.925 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v in-on (v) pwm turn-off threshold voltage (v in-off ) vs temperature 0.690 0.695 0.700 0.705 0.710 0.715 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v in-off (v) figure 17. pwm turn-on threshold voltage (v in-on ) vs. temperature figure 18. pwm turn-off threshold voltage (v in-off ) vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 11 sg6846b ? highly integrated green-mode pwm controller operation description startup operation the turn-on/turn-off thresholds are fixed internally at 16.5v and 10.5v. to enable the sg6846b during startup, the hold-up capacitor must first be charged to 16.5v through the startup resistor. if an open-circuit or short-circuit to ground occurs at the ri pin, the internal protection circuit immediately shuts down the controller. the hold-up capacitor continues to supply v dd before energy can be delivered from the auxiliary winding of the main transformer. the v dd must not drop below 10.5v during this startup proc ess. this uvlo hysteresis window ensures that the hold-up capacitor can adequately supply v dd during startup. the typical startup current is only 8a, which allows a high-resistance, low-wattage startup resistor to be used. for constant output power limit over a universal input- voltage range, the peak-current threshold is adjusted by the voltage of the vin pin. since the vin pin is connected to the rectified ac input line voltage through the resistive divider, a higher line voltage generates a higher v in voltage. the threshold voltage decreases as the v in increases, making the maximum output power at high line input voltage equal to that at low line input. the value of r-c network should not be so large it affects the power limit (shown in figure 19). r and c should put on less than 300 ? and 1000pf, respectively, to minimize power loss. a 1.5m ? /0.25w startup resistor and a 10f/25v v dd hold-up capacitor are sufficient for a universal input range. the required operating current has been reduced to 3.7ma, which enables higher efficiency and reduces the v dd hold-up capacitance requirement. green-mode operation the proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency under light-load conditions. maximum on-time is limited to provide protection against abnormal conditions. to further reduc e power consumption under zero-load condition, the pwm oscillator is completely turned off and the power supply enters burst-mode. green mode dramatically r educes power consumption under light-load and zero-load conditions. power supplies using sg6846b can meet restrictive international regulations regarding standby power consumption. oscillator operation a resistor connected from the ri pin to gnd generates a internal reference current source used to determine the pwm frequency. increasing the resistance decreases the amplitude of the current source and reduces the pwm frequency. using a 26k resistor results in a corresponding 65khz switching frequency. the relationship between r i and the switching frequency is: ) (k r 1690 (khz) i pwm f = (2) if an open-circuit or short-circuit to ground occurs at the ri pin, the internal protection circuit immediately shuts down the controller. two-level over-current protection (ocp) the cycle-by-cycle current limiting shuts down the pwm immediately when the switching current is over the peak-current threshold. additionally, when the switching current is higher than over-current threshold, the internal counter counts down. when the total accumulated counting time is more than ~200ms (r i = 26k ? ), the controller is latched off and the internal counter counts up. when the switching current is lower than over- current threshold, the internal counter counts down. when the total accumulated counting time is more than ~200ms (r i = 26k ? ), the controller is latched off. this two-level ocp protection and up/down counter are especially designed for smps with surge current output, such as those for printers, scanners, and motor drivers. constant output power limit for constant output power limit over universal input- voltage range, the peak-current threshold is adjusted by the voltage of the vin pin. since the vin pin is connected to the rectified ac input line voltage through the resistive divider, a higher line voltage generates a higher v in voltage. the threshold voltage decreases as v in increases, making the maximum output power at high-line input voltage equal to that at low-line input. brownout protection since the vin pin is connected through a resistive divider to the rectified ac input line voltage, it can also be used for brownout protection. if the v in voltage is less than 0.7v, the pwm output is shut off. if the v in is over 0.9v, the pwm output is turned on again. the hysteresis window for on/off is ~0.2v. v dd over-voltage protection (ovp) v dd over-voltage protection is built in to prevent damage. if v dd is over 24v, sg6846b is latched off. over-temperature protection (otp) an external ntc thermistor can be connected from the rt pin to gnd. the impedance of the ntc decreases at high temperatures. when the voltage of the rt pin drops below 1.05v, the sg6846b is turned off. for protection-mode options, see ordering information.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 12 sg6846b ? highly integrated green-mode pwm controller operation description (continued) noise immunity noise from the current sense or the control signal may cause significant pulse-width jitter, particularly in continuous-conduction mode. slope compensation helps alleviate this problem. good placement and layout practices should be followed. avoid long pcb traces and component leads. compensation and filter components should be located near the sg6846b. figure 19. current sense r-c filter
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 13 sg6846b ? highly integrated green-mode pwm controller reference circuit f1 2 1 + c2 r16 2 1 + c12 2 1 + c13 fb p16v p32v p16v cx1 32v ri 4 vin 3 fb 2 gnd 1 rt 5 sense 6 vdd 7 gate 8 u1 1 2 3 4 lf2 2 1 + c3 2 1 + c5 1 2 3 4 lf1 vz1 t rt1 r1 r2 r3 r4 r12 c4 2 1 d2 c6 2 1 d1 1 2 4 3 u2 r18 r15 r20 a k r u3 r21 r19 c9 1 3 2 d4 r7 r13 r14 1 2 3 q1 l1 c7 2 1 3 4 bd1 5 1 7 9 11 13 3 6 10 tx1 r17 2 1 + c14 2 1 + c15 16v c11 1 3 2 d5 l2 p32v p16v 2 1 d3 1 2 l4 r8 r9 r5 2 1 + c1 r6 r10 ntc1 cx2 p1 p2 fb 1 2 l3 2 1 + c16 2 1 + c17 cy1 cy2 p7 r11 fb 16v 32v p32v p16v p32v p16v p16v figure 20. application circuit for 32v / 16v output bom part no. value part no . value part no. value r1, r2, r3, r4 470k ? +/-5% c4 103p 630v d3 fr103 1.0a 200v r8, r9 s1m ? +/-1% c10,c11 102p 1kv bd1 dbl406g r5 16k2 ? +/-1% c6,c7 102p 50v d4 byt28-300 r15 1k5 ? +/-5% c9 222p 50v d5 byv32-150 r13 10 ? +/-5% c14,c17 470 25v f1 250v4a quick r18 4k7 ? +/-5% c15 220 25v l1,l2 1.8h r21 15k ? +/-1% c13,c16 220 50v l4 10h r7 27k ? +/-5% c2 150 400v u3 tl431 +/-1% r6 330 ? +/-1% c1 4.7 50v u1 sg6846 r19 102k ? +/-1% c3 10 50v u2 pc817 r14 0 ? 22 +/-5% cx1 x1 0.47 275v q1 7nb60 r16, r17 1w 20 ? +/-5% c8 y2 222p 250v tx1 ei-33 r11 20k ? +/-5% c5 100 50v rt1 sck053 r12 100k ? +/-5% cx2 x2 0.1f 275v vz1 14 470v r20 887k ? +/-1% d1 1n4148 r22 10k ? +/-1% d2 byv95c
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 14 sg6846b ? highly integrated green-mode pwm controller physical dimensions 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge figure 21. 8-pin small outline package (sop) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com sg6846b ? rev. 1.3.4 15 sg6846b ? highly integrated green-mode pwm controller

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